Power consumption is a concern in electronic memory operations. Power consumption falls into two categories, namely, stand-by power and dynamic power. In the stand-by or quiescent mode, the memory uses the least power because neither read operations nor write operations are occurring. Dynamic power consumption occurs during switching when memory is accessed for reads and/or writes.
Memory power consumption can be reduced by limiting the switching frequency and/or reducing the line capacitance because:P=C*V2*f*A where P=dynamic power; C is line capacitance; V is the voltage applied to the line operated; f is the frequency of memory access; and A is the activity factor, i.e., the number of switches as a system cycles through reads and writes.
Often, memory power consumption is managed by dividing the memory into banks and then only enabling one bank at a time. One reason for creating banks is to reduce the amount of capacitance, and reduce switching activity which in turn reduces dynamic power. Frequency normally is not subject to control because it is desirable to operate the memory at high frequencies. Reducing voltage of operation is a very powerful technique to reduce dynamic power because a “cubic” effect results, with a concomitant decrease in frequency. Reducing voltage, however, impacts performance. Other techniques for reducing dynamic power have included limiting the swing of a signal, and reducing switching events for each cycle.